Addressing the complexity of the embedded systems, including hardware and its associated software stack, represents a challenge for organizations. Hardware design teams are usually siloed with limited visibility into available IPs. Software stacks are often tracked using spreadsheets or other documents. Connectivity between these groups is usually broken.
To conquer these challenges, hardware and software teams need to come together to collaborate seamlessly in a single system that can handle the complexity for both. This starts during the planning phase. While scheduling and requirements management are usually managed on a per-project basis, having an IP-centric approach helps teams understand the status, commitment, and availability of each component of the design to improve time-to-market, reduce errors, and improve traceability.
Join Vishal Moondhra, Vice President of Semiconductor Solutions at Perforce, to discuss how to:
- Create reusable, pre-verified IP blocks complete with compatible, verified software.
- Plan your next chip using available IP throughout your organization.
- Unify teams with a dynamic IP-Centric Bill of Materials (BoM).
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Presenters
Vishal Moondhra
Vishal Moondhra is the VP of Solutions Engineering for Perforce IPLM. He has over 20 years of experience in Digital Design and Verification.
Vishal has an impressive resume of engineering and senior management positions including innovative startups like LGT and Montalvo, and large multinationals such as Intel and Sun. In 2008, Vishal co-founded Missing Link Tools, which built the industry's first comprehensive Design Verification management solution, bringing together all aspects of verification management into a single platform. Missing Link was acquired by Methodics Inc. in 2012; Methodics was acquired by Perforce in 2020.
Vishal is dedicated to helping users get the most out of Perforce IPLM through comprehensive webinars and continual product updates. He is a recognized expert in his field and often speaks to the current challenges in semiconductor design.