In today’s world of exponential complexity – with an increased need for global cooperation, a wide variety of products, large design footprints, and time-to-market pressures — the old siloed, project-based approach to building chips is no longer sufficient. 

To increase production without sacrificing cost, time, or quality, teams need to shift to an IP-centric design methodology. By doing this, they can eliminate inefficiencies in their design process that previously held them back and which led to expensive errors.

But how does a team move from a “copy and modify” project-centric process to this newer methodology? A new step-by-step blueprint for IP reuse, unified planning, and development at scale outlines how semiconductor companies can do just that.

In this webinar, Perforce VP of Solutions, and creator of this new model, Vishal Moondhra, walks through five levels of reaching IP-centric design  – beginning at the project-centric Level Zero to achieving planning at platform scope in Level Five. Join to find out more on how to:

  • Centralize IP information independent of DM systems.
  • Scale enterprise development.
  • Meet industry compliance regulations through traceability.


Vishal Moondhra, Helix IPLM VP Solutions

Vishal Moondhra

VP Solutions Engineering, Helix IPLM by Perforce

Vishal Moondhra, VP of Solutions Engineering for Helix IPLM, has over 20 years experience in Digital Design and Verification. He has held engineering and senior management positions with innovative startups including IgT and Montalvo, and large multinationals including Intel and Sun. In 2008, Vishal co-founded Missing Link Tools, which built the industry's first comprehensive Design Verification management solution, bringing together all aspects of verification management into a single platform. Methodics Inc. (now Helix IPLM) acquired Missing Link Tools in 2012.