Semiconductor design can be long and costly, with little room for error.
But when you can share and reuse IP — and design it once and reuse multiple variants — you can accelerate time-to-market and drive greater revenue for your business.
Methodics IPLM makes this possible by maximizing traceability and IP reuse by tightly coupling IP creators with IP consumers, automating the release process, streamlining workspace management, and providing a single source of truth for BoM creation and management.
Learn more by connecting with one of our IP experts today.
9 of the Top 10 Semiconductor Companies Use Perforce Solutions
The world’s best semiconductor companies trust Perforce solutions to meet time-to-market demands and generate more revenue faster.
Methodics IPLM Is a Unique All-in-One Platform
IP Lifecycle Management
Methodics IPLM ensures complete visibility into the state and usage of IP from the moment it enters the system until an SoC is delivered.
With Methodics IPLM, IP is a critical piece that must be understood and tracked at every step in the design process.
Methodics IPLM supports:
- Advanced tracking and management of the IP release flow across multiple projects.
- Global workspace management.
- IP bill of materials (BoM) management across the organization.
The above ensures critical design information is always available and transparent — and any potential problem can be instantly reproduced.
Design Data Management
Methodics IPLM and Helix Core (Perforce’s data management tool) work together to provide a powerful design data management (DM) solution.
With Methodics IPLM and Helix Core, everything is automatically abstracted from the design teams. This creates a seamless IP catalog with all IP available on demand from a central location.
Methodics IPLM also works with Git (including Perforce Git tools) and Subversion, as well as custom and proprietary data management systems.
Complete Execution History
Data is key to understanding current and past state of IP, and identifying potential issues before they become major problems. All activities within the IP lifecycle are captured in Methodics IPLM, including:
- Type of activity (build, test, release, etc.).
- Workspace configurations.
- Tool versions.
- Integrations to other engineering systems.
Comprehensive Quality Management
Unproven IP represents a significant risk to any SoC design.
To ensure quality, Methodics IPLM can be configured to ensure IP undergoes qualification prior to being made available to the design team(s). Once qualification has been successfully completed, IP is made visible through a formal release process and can be utilized in a design.
Read more in our white paper, Traceability For the Design Verification Process.
Streamline your SoC development with the use of a Planning BoM.
This tool extends the IP Catalog to include planned IPs, in-progress IPs, and complete IPs in the same interface to give visibility to all IP, both planned and real.
With a Planning BoM, you can:
- Automate the workflow of new project and IP creation.
- Perform requirements-driven “What-If” analysis of IP decisions, such as build vs. buy vs. reuse.
- Understand cost impact and scheduling impact of choices.
- Drive towards delivery of an execution BoM.
- Commit what you will deliver in a project.
Features SoC Design Teams Love
Key Methodics IPLM Features
Methodics IPLM features include the following.
Detailed IP Release Tracking
Every aspect of the IP lifecycle is tracked and visible in Methodics IPLM in easy-to-understand configurable dashboards. For any given release, designers can see the projects the IP has been used in, any outstanding bugs, derivative designs, regression status, and much more.
This detailed information ensures transparency and benefits both the IP creators as well as the IP consumers.
The most critical part of IP distribution is making the design team aware of IP available to them complete with detailed release and usage information.
Methodics IPLM includes an integrated IP catalog with powerful permission and filtering capabilities. This ensures all members of the design team can find IP (and only the IP) that is available to them.
Since usage is tracked across projects, potential users of IP can collaborate with other teams to deploy IP more effectively.
Analog and Digital IP Design Management
New IP creation can leverage Methodics IPLM for analog and digital design (through VersIC). This allows designers to commit data to the IP repository, carry out qualification, and perform releases directly from the design tools they use every day.
With no additional effort, IP design teams can interface directly with the central IP management and SoC teams.
Parent-Child Aware Defect Tracking
Defect tracking for IP management needs to understand and track all derivatives and configurations of an IP. This ensures issues can be quickly communicated across all IP deployments.
Methodics IPLM integrates with industry standard defect tracking tools. This enables IP status to be tracked using your existing infrastructure. These existing tools are expanded to create a fully IP aware defect tracking system complete with the ability to track complex parent-child relationships.
Effective notifications speed up communication, improve overall quality, and can save significant amount of wasted effort in a design.
The powerful notification infrastructure in Methodics IPLM enables users to be automatically notified. The Methodics IPLM event engine can capture significant events when they occur that could impact their design work. For example, you can be notified of IP releases, bugs, approvals, etc.
Additionally, the administrators of the system can define additional customer-specific notification criteria to fit seamlessly into existing design processes.
Customizable Task-Specific Dashboards With RESTful API
Data is key to making informed project decisions. Methodics IPLM integrates a powerful data analytics platform, based on an extensible widget-based design.
Default dashboard configurations are provided for common design tasks, such as IP qualification, IP release status, and IP usage information.
You can also use the RESTful API for custom dashboards, including company specific reporting, industry compliance, or integration of existing corporate systems.
Methodics IPLM Scales to Meet Your Needs
Scalable Distribution Infrastructure
Whether working globally or locally, it is important to ensure that users of an IP have the data they need when they need it. This isn’t an easy task when some IP data is measured in the tens of gigabytes.
Methodics IPLM provides a unique IP distribution infrastructure. This complements traditional DM replication with specialized IP caching technology. So, when an IP is used, within a project all members of the team will have access to the same data at the same time.
Data appears local to all designers, hiding significant latency that may exist in multisite global projects. Flexible IP distribution options means IP can be automatically “pushed” out to users of the IP or can be “pulled” on request.
This IP caching technology also significantly reduces the overall disk space requirements for a project since all references to the IP point back to the original cache entry.
Configuration and Workspace Management
The workspace is the central component of SoC integration. It’s the point where IP and the rest of the design come together.
The Methodics IPLM platform includes comprehensive configuration and workspace controls. This ensures that designers have access to the data they need — and only the data they need.
Comprehensive controls enable the administrators to determine the design files, IP, tools, machines, and other infrastructure components that are available to team members.
Learn more in our white paper, Correct-by-Construction Workspaces.
Real-time Multisite Workspace Creation
Methodics IPLM has a powerful workspace management engine. It reduces disk space requirements and facilitates real-time workspace setup and delete — even for workspaces requiring data from remote repositories.
This is enabled using self-maintaining replication caches with high performance parallelized syncs, ensuring that you have the data you need, when you need it. Unlike other solutions, we do not require changes to the underlying infrastructure.
Design configurations are stored centrally and enforce common working data across design centers. Updates can be configured on a “push” or “pull” basis to ensure that all designers on a project stay in sync with the latest design configuration.
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