During a project, subsystem and full-chip integration plays a crucial role. Integration can be particularly challenging on large SoCs with distributed teams due to complexity of the integration process, multi-site infrastructure issues, as well as the need to collaborate across multiple time zones. Often, integrators must integrate design blocks delivered by distant teams on which they do not possess any expertise. This causes long lead times with the integration process, repeated debugging of similar issues, and a perpetual state of missing key integration milestones. With IP-centric design and the use of "IP aliases," we propose a methodology that provides a streamlined, controlled, quality-based, and transparent flow that helps teams reliably meet integration milestones and more easily debug integration issues.
Learn More About IP-Centric Design Using Perforce IPLM
Presenters
Vishal Moondhra
Vishal Moondhra is the VP of Solutions Engineering for Perforce IPLM. He has over 20 years of experience in Digital Design and Verification.
Vishal has an impressive resume of engineering and senior management positions including innovative startups like LGT and Montalvo, and large multinationals such as Intel and Sun. In 2008, Vishal co-founded Missing Link Tools, which built the industry's first comprehensive Design Verification management solution, bringing together all aspects of verification management into a single platform. Missing Link was acquired by Methodics Inc. in 2012; Methodics was acquired by Perforce in 2020.
Vishal is dedicated to helping users get the most out of Perforce IPLM through comprehensive webinars and continual product updates. He is a recognized expert in his field and often speaks to the current challenges in semiconductor design.