Managing your design activity in an IP-based development flow delivers many advantages.

Optimally partitioned designs — where each block is treated as a reusable, self contained IP with versioned dependencies on other blocks — allow teams to be significantly more lean, agile, and flexible. IP-centric methodology also allows users to attach relevant metadata to each IP, enabling a view of the full context of the design

However, adding standards compliance to an IP-based workflow can present unique challenges that need to be handled in a comprehensive and scalable manner.

ISO 26262 Compliance in a Highly Dynamic Design

Since each IP can potentially be reused — in dramatically different contexts — it is important to ensure that all a IPLM system understands usage context and hierarchies when managing compliance.

Read this white paper to learn how using Methodics IPLM simplifies the FuSa process for an ISO 26262 compliant flow for semiconductors with discussion of:

  • Complexity due to reuse, rapid change, IP type, and IP hierarchy.
  • Advantages of an IPLM system.
  • Building the compliance workflow.

Fill out the form to get access to this white paper and solve the various challenges posed by ISO 26262 compliance.